In an integrated circuit, before supplying a clock signal to components, the clock signal will be buffered through clock buffers such that the clock signal becomes more steady. As shown in FIG. 6, a prior art clock buffer is disclosed. If it is desired to cause a circuit not to work, the general way is stop sending any signal to the circuit. For example, a counting circuit is formed by a plurality of flip-flops, each having a clock input and a data input. If it is desired to stop the action of the counting circuit, the conventional way is stop sending any data signal to the circuit, while still sending clock signal to the flip-flops. Although the circuit does not perform counting function, the flip-flops still receive clock signals. Therefore, clock buffers and flip-flops still consume power and this power consumption increases as the gate count and working frequency increase. As a consequence, the cost is increased and the reliability reduces.